I2C Protocol Subtleties – Aspect 1

This report is the first in a collection describing the far more ‘subtle’ aspects of the I2C Protocol, initially produced by Philips.

Given that you are studying this sequence, I am assuming you now know what the I2C bus is, and you might be searching to steer clear of some suffering when you will need to use it in a undertaking. If so, you’ve got come to the correct location. If not, I am going to be adding some introductory I2C data before long at my internet site.

Just so we’re obvious, this sequence will not involve coverage of the Superior-velocity manner, as this is substantially unique from the style and design and habits of the regular 2-wire shared-bus implementation, and is also not that frequently applied. There is plenty of fantastic reference material available on the Website that addresses this mode.

This is a speedy listing of what will be protected in the rest of the series:

• lacking Commence
• missing Cease
• Recurring Get started
• lacking knowledge bits
• missing ACK/NAK
• facts immediately after NAK
• back again-to-again errors
• pullup resistors
• bus repeaters
• implementation working with a comprehensive-components TWI or I2C peripheral
• implementation using a USI peripheral
• implementation making use of a USART peripheral
• SMBus variances from I2C

Now, on to the good things!

For this post, we will concentrate on the 3 types of implementations you may uncover in models right now: total components, components/software program combine, and whole application (or ‘bit-bang’ as it is occasionally identified as).

Many microcontrollers right now, even some low-close units, include things like a totally-hardware I2C peripheral. Atmel refers to theirs as TWI, Microchip calls theirs I2C other distributors use similar naming. When utilizing a thoroughly-hardware method, it is actually challenging to generate any form of bus error unless of course you misunderstand how the peripheral works or what a accurate I2C bus sequence should really glance like. In general, although, this technique calls for the least in-depth comprehending of the protocol itself.

The USI peripheral identified in some Atmel products is a minimal-components style that depends on application interaction to make it a finish implementation. This adaptable peripheral can in fact be utilised for I2C, SPI and UART configurations, and is appropriate for minimal-finish devices where including all a few peripherals would be price tag-prohibitive. Despite the fact that it necessitates more coding than a TWI or complete-components I2C peripheral, it is in some means far more adaptable. This strategy requres a extra in-depth being familiar with of the protocol, as you are responsible for relocating from one particular point out to the future, and it is possible to go in the wrong route.

Finally, utilizing a 100% computer software approach requires a entire comprehending of the I2C protocol. Virtually every microcontroller seller delivers software notes and code examples for developing an I2C Learn unit employing a pure-computer software alternative. Unlike a UART, I2C is a clocked (fairly than timed) protocol, so interruptions in the execution of the protocol are tolerated properly, allowing interrupts to be serviced without having problem for losing information. The most pace of the software-based mostly resolution is in the long run decided by the CPU clock pace, and usually a Learn implementation can very easily get to the 400KHz fee.

A software program-dependent implementation of a Slave device is substantially far more challenging. With out components help, the computer software have to watch both of those the SDA and the SCL lines at the same time in buy to detect clock edges and know positively the condition of the SDA line prior to the rise or drop of SCL. Detection of a Start off or End issue will generally require the use of interrupts, usually the application would want to be 100% eaten with monitoring SCL and SDA. Software package-based mostly Slave implementations tend to be CPU-sure, requiring many MIPS to obtain even 100KHz procedure. Thus, accurate application-only Slave implementations could not even exist for some microcontroller households, and other people may perhaps not be capable of reaching full 100KHz bus velocity.

With this components and computer software basis getting been laid, we will dive deeper into the protocol alone in our upcoming article. Many thanks for reading through!

(Copyright 2010 Robert G. Fries)